{"id":17892,"date":"2026-06-10T08:56:33","date_gmt":"2026-06-10T00:56:33","guid":{"rendered":"https:\/\/ab123.xyz\/?p=17892"},"modified":"2026-06-10T08:56:33","modified_gmt":"2026-06-10T00:56:33","slug":"risc-v-%e5%bc%80%e6%ba%90%e7%a1%ac%e4%bb%b6%e7%a4%be%e5%8c%ba%e9%a1%b9%e7%9b%ae%e6%8e%a8%e8%8d%90%ef%bc%9aserv%e3%80%81picorv32-%e7%ad%89%e5%85%a5%e9%97%a8","status":"publish","type":"post","link":"https:\/\/ab123.xyz\/?p=17892","title":{"rendered":"RISC-V \u5f00\u6e90\u786c\u4ef6\u793e\u533a\u9879\u76ee\u63a8\u8350\uff1aserv\u3001picorv32 \u7b49\u5165\u95e8"},"content":{"rendered":"<p>RISC-V \u4f5c\u4e3a\u5f00\u6e90\u6307\u4ee4\u96c6\u67b6\u6784\uff0c\u8fd1\u5e74\u5438\u5f15\u4e86\u5927\u91cf\u786c\u4ef6\u7231\u597d\u8005\u4e0e\u5f00\u53d1\u8005\u52a0\u5165\u3002\u5bf9\u4e8e\u521a\u63a5\u89e6\u8be5\u9886\u57df\u7684\u7528\u6237\u800c\u8a00\uff0c\u9009\u62e9\u5408\u9002\u7684\u5f00\u6e90\u786c\u4ef6\u9879\u76ee\u8fdb\u884c\u5b9e\u8df5\u81f3\u5173\u91cd\u8981\u3002\u672c\u7bc7\u6587\u7ae0\u5c06\u91cd\u70b9\u63a8\u8350 serv\u3001picorv32 \u7b49\u7ecf\u5178\u5165\u95e8\u9879\u76ee\uff0c\u5e76\u4ecb\u7ecd\u5176\u529f\u80fd\u3001\u4f18\u52bf\u53ca\u4f7f\u7528\u573a\u666f\uff0c\u5e2e\u52a9\u65b0\u624b\u5feb\u901f\u4e0a\u624b\u3002\u5b98\u65b9\u9879\u76ee\u8d44\u6e90\u53ef\u8bbf\u95ee <a href=\"https:\/\/riscv.org\" target=\"_blank\">\u5b98\u65b9\u7f51\u7ad9<\/a> \u83b7\u53d6\u6700\u65b0\u6587\u6863\u4e0e\u793e\u533a\u52a8\u6001\u3002<\/p>\n<h2>serv\uff1a\u8f7b\u91cf\u7ea7\u95e8\u7ea7 RISC-V \u5185\u6838<\/h2>\n<p>serv \u662f\u4e00\u6b3e\u57fa\u4e8e\u95e8\u7ea7\u5efa\u6a21\u7684\u8d85\u8f7b\u91cf RISC-V \u5185\u6838\uff0c\u4e13\u4e3a FPGA \u548c ASIC \u6559\u5b66\u573a\u666f\u8bbe\u8ba1\u3002\u5176\u6838\u5fc3\u4f18\u52bf\u5728\u4e8e\u4ee3\u7801\u6781\u7b80\uff0c\u4ec5\u5305\u542b\u7ea6 200 \u884c Verilog \u4ee3\u7801\uff0c\u4fbf\u4e8e\u521d\u5b66\u8005\u7406\u89e3\u5904\u7406\u5668\u7684\u57fa\u672c\u6570\u636e\u901a\u8def\u4e0e\u63a7\u5236\u903b\u8f91\u3002<\/p>\n<h3>\u529f\u80fd\u4e0e\u4f18\u52bf<\/h3>\n<ul>\n<li>\u652f\u6301 RV32I \u57fa\u7840\u6307\u4ee4\u96c6\uff0c\u65e0\u6d41\u6c34\u7ebf\u7ed3\u6784\uff0c\u903b\u8f91\u6e05\u6670\u3002<\/li>\n<li>\u53ef\u7efc\u5408\u81f3\u5e38\u7528 FPGA \u5e73\u53f0\uff0c\u5982 Lattice iCE40 \u548c Xilinx Artix-7\u3002<\/li>\n<li>\u914d\u5957\u8be6\u7ec6\u7684\u6ce8\u91ca\u6587\u6863\u4e0e\u4eff\u771f\u6d4b\u8bd5\u5e73\u53f0\uff0c\u964d\u4f4e\u5b66\u4e60\u95e8\u69db\u3002<\/li>\n<\/ul>\n<h3>\u5e94\u7528\u573a\u666f\u4e0e\u4e0a\u624b\u5efa\u8bae<\/h3>\n<p>serv \u6700\u9002\u5408\u4f5c\u4e3a\u5927\u5b66\u8bfe\u7a0b\u4e2d\u201c\u8ba1\u7b97\u673a\u7ec4\u6210\u539f\u7406\u201d\u7684\u52a8\u624b\u5b9e\u9a8c\u9879\u76ee\u3002\u7528\u6237\u53ea\u9700\u5b89\u88c5\u5f00\u6e90\u5de5\u5177\u94fe\uff08\u5982 Verilator \u6216 Icarus Verilog\uff09\uff0c\u5373\u53ef\u5728\u672c\u5730\u8fd0\u884c\u4eff\u771f\uff0c\u89c2\u5bdf\u6307\u4ee4\u6267\u884c\u5168\u8fc7\u7a0b\u3002<\/p>\n<h2>PicoRV32\uff1a\u6027\u80fd\u4e0e\u8d44\u6e90\u5e73\u8861\u7684\u7ecf\u5178\u9009\u62e9<\/h2>\n<p>PicoRV32 \u662f\u53e6\u4e00\u4e2a\u5e7f\u4e3a\u4eba\u77e5\u7684\u5f00\u6e90 RISC-V \u5185\u6838\uff0c\u7531 Clifford Wolf \u5f00\u53d1\u3002\u5b83\u652f\u6301 RV32IMC \u6307\u4ee4\u96c6\uff08\u542b\u4e58\u9664\u6cd5\u4e0e\u538b\u7f29\u6307\u4ee4\uff09\uff0c\u8d44\u6e90\u5360\u7528\u6781\u5c0f\uff0c\u9002\u5408\u5d4c\u5165\u81f3 SoC \u8bbe\u8ba1\u3002<\/p>\n<h3>\u6838\u5fc3\u7279\u70b9<\/h3>\n<ul>\n<li>\u5355\u5468\u671f\u6216\u53cc\u5468\u671f\u5b9e\u73b0\uff0c\u6700\u9ad8\u9891\u7387\u53ef\u8fbe 100MHz\uff08\u53d6\u51b3\u4e8e\u5de5\u827a\uff09\u3002<\/li>\n<li>\u652f\u6301\u4e2d\u65ad\u63a7\u5236\u5668\u4e0e\u8c03\u8bd5\u63a5\u53e3\uff0c\u53ef\u8fd0\u884c FreeRTOS \u7b49\u8f7b\u91cf RTOS\u3002<\/li>\n<li>\u642d\u914d AXI4-Lite \u603b\u7ebf\uff0c\u6613\u4e8e\u96c6\u6210\u5230\u73b0\u6709 FPGA \u9879\u76ee\u4e2d\u3002<\/li>\n<\/ul>\n<h3>\u5feb\u901f\u5165\u95e8\u6b65\u9aa4<\/h3>\n<p>\u5f00\u53d1\u8005\u53ef\u4ece GitHub \u4e0b\u8f7d\u6e90\u7801\uff0c\u4f7f\u7528 Vivado \u6216 Yosys \u8fdb\u884c\u7efc\u5408\u3002\u914d\u5408\u5b98\u65b9\u63d0\u4f9b\u7684\u88f8\u673a\u793a\u4f8b\u7a0b\u5e8f\uff0c\u5341\u5206\u949f\u5185\u5373\u53ef\u5728 FPGA \u5f00\u53d1\u677f\u4e0a\u8fd0\u884c\u201cHello World\u201d\u4e32\u53e3\u8f93\u51fa\u3002<\/p>\n<h2>\u66f4\u591a\u793e\u533a\u63a8\u8350\u9879\u76ee<\/h2>\n<p>\u9664\u4e86\u4e0a\u8ff0\u4e24\u4e2a\u9879\u76ee\uff0c\u4ee5\u4e0b\u5f00\u6e90\u786c\u4ef6\u4e5f\u503c\u5f97\u5173\u6ce8\uff1a<\/p>\n<ul>\n<li><strong>VexRiscv<\/strong>\uff1a\u57fa\u4e8e SpinalHDL \u7684\u53ef\u914d\u7f6e\u6d41\u6c34\u7ebf RISC-V\uff0c\u652f\u6301 Linux \u5f15\u5bfc\u3002<\/li>\n<li><strong>Rocket Chip<\/strong>\uff1a\u7531 UC Berkeley \u5f00\u53d1\uff0c\u652f\u6301\u591a\u6838\u4e0e\u5411\u91cf\u6269\u5c55\uff0c\u9002\u5408\u6df1\u5165\u7814\u7a76\u3002<\/li>\n<\/ul>\n<h3>\u5982\u4f55\u9009\u62e9\u4e0e\u5f00\u59cb<\/h3>\n<p>\u65b0\u624b\u5efa\u8bae\u4ece serv \u5165\u95e8\u7406\u89e3\u539f\u7406\uff0c\u518d\u8fc7\u6e21\u5230 PicoRV32 \u8fdb\u884c\u5b9e\u9645 SoC \u5f00\u53d1\u3002\u4e4b\u540e\u53ef\u501f\u52a9\u793e\u533a\u8bba\u575b\uff08\u5982 RISC-V International \u5b98\u65b9 Slack\uff09\u83b7\u53d6\u5e2e\u52a9\u3002<\/p>\n<p>\u603b\u4e4b\uff0cRISC-V \u5f00\u6e90\u793e\u533a\u4e3a\u4e0d\u540c\u5c42\u6b21\u7684\u5f00\u53d1\u8005\u63d0\u4f9b\u4e86\u4e30\u5bcc\u8d44\u6e90\u3002\u901a\u8fc7\u52a8\u624b\u5b9e\u8df5 serv\u3001picorv32 \u7b49\u9879\u76ee\uff0c\u4f60\u4e0d\u4ec5\u80fd\u638c\u63e1\u5904\u7406\u5668\u8bbe\u8ba1\u57fa\u7840\uff0c\u8fd8\u80fd\u53c2\u4e0e\u5168\u7403\u5f00\u6e90\u786c\u4ef6\u751f\u6001\u5efa\u8bbe\u3002<\/p>\n","protected":false},"excerpt":{"rendered":"<p>RISC-V \u4f5c\u4e3a\u5f00\u6e90\u6307\u4ee4\u96c6\u67b6\u6784\uff0c\u8fd1\u5e74\u5438\u5f15\u4e86\u5927\u91cf\u786c\u4ef6\u7231\u597d\u8005\u4e0e\u5f00\u53d1\u8005\u52a0\u5165\u3002\u5bf9\u4e8e\u521a\u63a5\u89e6\u8be5\u9886\u57df\u7684\u7528\u6237\u800c\u8a00\uff0c\u9009\u62e9\u5408\u9002\u7684 [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[4],"tags":[21253,20932,21252,21259,20953],"class_list":["post-17892","post","type-post","status-publish","format-standard","hentry","category-4","tag-picorv32","tag-risc-v","tag-serv","tag-21259","tag-20953"],"_links":{"self":[{"href":"https:\/\/ab123.xyz\/index.php?rest_route=\/wp\/v2\/posts\/17892","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ab123.xyz\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ab123.xyz\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ab123.xyz\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/ab123.xyz\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=17892"}],"version-history":[{"count":1,"href":"https:\/\/ab123.xyz\/index.php?rest_route=\/wp\/v2\/posts\/17892\/revisions"}],"predecessor-version":[{"id":17893,"href":"https:\/\/ab123.xyz\/index.php?rest_route=\/wp\/v2\/posts\/17892\/revisions\/17893"}],"wp:attachment":[{"href":"https:\/\/ab123.xyz\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=17892"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ab123.xyz\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=17892"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ab123.xyz\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=17892"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}